Retrieving x86 Processor Information
The other day I needed to know within one of my experimental programs if the host x86 processor supports certain features. In many cases, the operating system provides interfaces that can answer such questions. Sometimes, the interfaces may not have the answer, or you may wish to avoid them for other reasons. (Say, you don’t wish to depend on anything operating-system-specific.) Of course, one can turn to the x86 processor’s venerable CPUID instruction. I took some code from the xnu kernel and made it into a user-space program that displays processor information. For academic needs, it is always good to have a program at hand that does things from first principles.
Here is the source for cpuinfo_x86.
The following is an example of the program in action. You must compile it as a 32-bit program. Besides Mac OS X, the program should also work on Linux, FreeBSD, and perhaps some other operating systems.
$ gcc -march=i386 -m32 -o cpuinfo_x86 cpuinfo_x86.c $ ./cpuinfo_x86 # Identification Vendor : GenuineIntel Brand String : Intel(R) Xeon(R) CPU X5550 @ 2.67GHz Model Number : 26 (Nehalem) Family Code : 6 Extended Model : 1 Extended Family : 0 Stepping ID : 5 Signature : 67237 # Address Bits Physical Addressing : 40 Virtual Addressing : 48 # Multi-Core Information Logical Processors (Threads) per Physical Processor : 16 Cores per Physical Package : 8 # Caches ## L1 Instruction Cache Size : 32K Line Size : 64B Sharing : shared between 2 processor threads Sets : 128 Partitions : 1 Associativity : 4 ## L1 Data Cache Size : 32K Line Size : 64B Sharing : shared between 2 processor threads Sets : 64 Partitions : 1 Associativity : 8 ## L2 Unified Cache Size : 256K Line Size : 64B Sharing : shared between 2 processor threads Sets : 512 Partitions : 1 Associativity : 8 ## L3 Unified Cache Size : 8M Line Size : 64B Sharing : shared between 16 processor threads Sets : 8192 Partitions : 1 Associativity : 16 # Translation Lookaside Buffers Instruction TLBs : 7 large, 0 small Data TLBs : 32 large, 64 small # Features ACPI : Thermal Monitor and Software Controlled Clock APIC : On-Chip APIC Hardware CLFSH : CLFLUSH Instruction CMOV : Conditional Move Instruction CX16 : CMPXCHG16B Instruction CX8 : CMPXCHG8 Instruction DCA : Direct Cache Access DE : Debugging Extension DS : Debug Store DS-CPL : CPL Qualified Debug Store DTES64 : 64-Bit Debug Store EST : Enhanced Intel SpeedStep Technology FPU : Floating-Point Unit On-Chip FXSR : FXSAVE and FXSTOR Instructions HTT : HyperThreading MCA : Machine-Check Architecture MCE : Machine-Check Exception MMX : MMX Technology MONITOR : MONITOR/MWAIT Instructions MSR : Model Specific Registers MTRR : Memory Type Range Registers PAE : Physical Address Extension PAT : Page Attribute Table PBE : Pending Break Enable PDCM : Perfmon and Debug Capability PGE : Page Global Enable POPCNT : POPCNT Instruction PSE : Page Size Extension PSE-36 : 36-Bit Page Size Extension SEP : Fast System Call SS : Self-Snoop SSE : Streaming SIMD Extensions SSE2 : Streaming SIMD Extensions 2 SSE3 : Streaming SIMD Extensions 3 SSSE3 : Supplemental Streaming SIMD Extensions 3 SSE4.1 : Streaming SIMD Extensions 4.1 SSE4.2 : Streaming SIMD Extensions 4.2 TM : Thermal Monitor TM2 : Thermal Monitor 2 TSC : Time Stamp Counter VME : Virtual Mode Extension VMX : Virtual Machine Extensions xTPR : xTPR Update Control # Extended Features EM64T : Intel Extended Memory 64 Technology XD : Execution Disable
Despite the detailed information cpuinfo_x86 shows, it is still does not retrieve all possible information you can get through CPUID. Moreover, because I wrote it for the x86 version of Mac OS X, the program assumes that you have a relatively recent x86 processor and will likely not behave too well on old processors. Writing an exhaustive and legacy-aware CPUID program is a more rigorous programming exercise.